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Using Netlist Compare, I'm getting a false error report -- Please help!

We seem to have (what I believe to be) false error report. This board is a backplane PCB with blind holes. The Gerber data shows many open nets when compared to the imported netlist. It seems to be only happening on the external layers.
Can you have a look at the attached .WRK file and see if I am missing something?
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Thanks for contacting me. 

When I loaded your workspace, I believe the Blind/Buried Drill files may not have been set up correctly.  For example both Blind/Buried drill layers "nc_drill_BLIND_L1-L10.drl" "nc_drill_BLIND_L11-L20.drl", did not have the correct layers associated with them.  I went to the menu:  Setup | Blind/Buried..., and assigned metal layers 1-10 (for the first drill), and layers 11-20 (for the second drill file).

Once I did that there was No Net Compare Errors when I ran the check.  See my quick tutorial movie below:

Thank you Simon! I figured I was missing something.
I only assigned the drill layer type to blind/buried and did not do the
other setup.Thanks and I look forward to V7!

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